{
 "_doc": "One result as verifycorelabs.com prints it: the headline, the problem and the buyer cut (never reworded) from the lab's plain-English account of the result, the one figure a buyer is shown and its limit, and the lab's current claim and limits verbatim, copied at the commit named in source. A field is left out, never reworded, when it uses a word this site keeps for its own process or names a file this site does not serve (not_reprinted).",
 "slug": "pairwise-impossibility",
 "company": "ChipletOS",
 "order": 8,
 "rank": 8,
 "served_receipt": "packaging-extraction/results/forall-impossibility-pairwise.json",
 "lab_file_older": false,
 "headline": [
  "Inside a simplified physics model the lab froze (not a full field solve), a computer search that covers every point of one narrow family of layouts — four vertical metal connections in a chip package",
  "not a sample — shows that the quick shortcut of adding up their electrical coupling one pair at a time always overstates the worst coupling",
  "in that model"
 ],
 "qualification": [
  "four size-and-spacing knobs held inside a fixed range",
  "while against the lab's more exact solver the figure is about 9.8 percent and only measured on examples, not proved"
 ],
 "why": [
  "A designer who estimates coupling between neighbouring vertical connections one pair at a time",
  "has only sampled examples of how wrong that shortcut can be, not a guaranteed minimum error over a whole family of layouts."
 ],
 "buyer": [
  "makers of fast chip-package and interposer extraction tools (electronic design automation vendors) and package signal-integrity teams that use such tools."
 ],
 "figure": "over-predicts the worst coupling by at least 1.10467287× (≥10.467287%)",
 "figure_from": "claim",
 "limit": "Against BEM the carried-through figure is ≈9.79% and is empirical, not certified.",
 "limit_from": "lab scope",
 "plain": "always overstates the worst coupling",
 "quotes": {},
 "numbers": {
  "sup_certified_k_hi": 0.9052453688833432,
  "sup_certified_k_hi_from": "holdco/v3/proofs/pairwise-impossibility/family_two_tight_pairs_certified_sup_2026_08.json#/sup_certified_k_hi"
 },
 "claim": "For every layout in the declared two_tight_pairs family, pairwise superposition over-predicts the worst coupling by at least 1.10467287× (≥10.467287%), certified by interval branch-and-bound rather than sampled.",
 "not_reprinted": [
  "limits"
 ],
 "prior_work": [
  {
   "title": "TSV-Based 3-D ICs: Design Methods and Tools",
   "by": "Tiantao Lu, Caleb Serafy, Zhiyuan Yang, Sandeep Kumar Samal, Sung Kyu Lim, Ankur Srivastava, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 36(10), 2017",
   "url": "https://gtcad.gatech.edu/www/papers/07849155.pdf"
  },
  {
   "title": "Rigorous treatment of pairwise and many-body electrostatic interactions among dielectric spheres at the Debye–Hückel level",
   "by": "O. I. Obolensky, T. P. Doerr, Yi-Kuo Yu, European Physical Journal E, 2021",
   "url": "https://pmc.ncbi.nlm.nih.gov/articles/PMC8523465/"
  },
  {
   "title": "Interval Computations: Introduction, Uses, and Resources",
   "by": "R. B. Kearfott, preprint hosted by reliable-computing.org (year not printed on the fetched copy)",
   "url": "https://www.reliable-computing.org/archive/preprints/survey.pdf"
  }
 ],
 "source": {
  "claims_file": "registry/CLAIMS_CURRENT.jsonl",
  "claims_sha256": "81776df15a1498abec7228ea179c952d01c54e031ffd4144498a30660963074b",
  "ranking_file": "views/VALUE_RANKING.md",
  "ranking_sha256": "2e980e26178b34dc49ec1d365f966be292f57d7c636143fc62c12feab72ae470",
  "dossier_sha256": "ca279ff9eb1ef47d8700ba5492534b0b3ad3fc64713b428cd92b6b116f1d7251",
  "commit": "25d755d2f06518b632c3658ae83f20312daac53e"
 }
}
