ChipletOS · Chip printing
Checked brightness ranges for chip prints
A check of how a chip pattern will print that gives, for every point of the image, a range for its brightness. On every test mask the lab’s detailed simulation fell inside the range, apart from a rounding error in one internal step that the range leaves out.
Who did this. The lab’s AI agents did the research and engineering. Nick Harris, founder. CTO of VivaMed BioPharma; co-founder of MedSim.ai, FastRead.io and Formulai. The lab’s track record.
What we showed
For every pixel of each one, the brightness the lab’s detailed simulation gives fell inside the range the check computed. An approval check built on the ranges made no wrong approvals after a fault the lab found was fixed; that count is from a smaller approval test on some of the same masks on which the fault was found, not a held-out test.
- Limit.
- Relative to the lab’s own imaging simulation on one fixed grid, not silicon, on a finite set of test masks. The range leaves out the rounding error of one internal calculation step, and this site prints no size for it because the lab’s record gives none.
The problem
Approximate printing checks can approve a mask pattern that the slow, accurate simulation would reject, and the error then shows up later.
What it means for a buyer
If you sign off masks or sell the software that does: an approximate check that approves a pattern the slow simulation would reject costs you later. This check computes a brightness range for every point of the image, and on the lab’s test masks the detailed simulation never fell outside it; the range leaves out the rounding error of one internal step. What it gives a buyer today is a finite test against the lab’s own simulation, not a guarantee about real silicon.
Who we expect would buy
Teams we expect would care (no customer or pilot yet): computational-lithography software vendors, mask-inspection vendors and foundry mask-signoff teams.
Why now
Simulating how masks will print already costs the industry tens of billions of processor hours a year, by NVIDIA’s account when it launched its GPU lithography library with ASML, TSMC and Synopsys (press release). A check that could sign a mask off faster than a full re-simulation would cut into that bill; the lab has not measured any such saving for its own checks.
Why you can trust the check
Every number is relative to the lab’s own imaging simulation, and no outside tool or party has checked it. The lab’s check confirms that the saved results still carry the claimed figures but does not re-run the simulation, so a buyer would want to re-run it on their own imaging model.
No outside firm has audited it. How this result’s check works, step by step.
What this does not show yet
- The range is checked against the lab’s own detailed simulation on one fixed grid, not silicon, and it leaves out one rounding step, so it is not a guarantee.
- The range leaves out the rounding error of one internal calculation step, so the lab’s word “guaranteed” holds only apart from that error. The lab’s record gives no size for that error.
- It is a finite set of test masks, and the checks within one mask are correlated rather than independent trials.
- Before the lab found and fixed a fault, the approval check built on the ranges gave 90 wrong approvals in the same test. After the fix it gave none, on the same set of test masks where the fault was found.
- Cases just across a threshold are untested: not observed, and not excluded.
- The speed figures the lab quoted before 2026-09-24 did not match the file they were taken from and are no longer claimed; its current timings depend on machine load and are corroboration only.
Prior work
Named in the lab’s prior-art search for this result, and credited here.
- An Abstraction-guided Approach to Scalable and Rigorous Floating-Point Error Analysis, Arnab Das, Ian Briggs, Ganesh Gopalakrishnan, Pavel Panchekha, Sriram Krishnamoorthy, arXiv 2004.11960, 2020
- On the Effectiveness of Interval Bound Propagation for Training Verifiably Robust Models, Sven Gowal, Krishnamurthy Dvijotham, Robert Stanforth, Rudy Bunel, Chongli Qin, Jonathan Uesato, Relja Arandjelovic, Timothy Mann, Pushmeet Kohli, arXiv 1810.12715, 2018
The exact wording, for a technical reader
The lab’s own sentences and figures for this result, word for word, its limits in plain words where the lab’s text cannot be reprinted: Checked brightness ranges for chip prints, exact wording.
Check it yourself
- This result’s file: every sentence and figure on this page that is the lab’s own, copied from its current record at the commit the file names.
- The lab’s earlier result file: older than the current record above. The speed figures it prints are no longer claimed (see the exact wording).
- ChipletOS, the company that carries this result.
Related results across the group
- This result on chipletos.com, ChipletOS’s own site.
- A fast coupling model, graded by outside solvers (ChipletOS, chip packaging)
- The capacitance flat models leave out (ChipletOS, chip packaging)
- Pair-by-pair coupling estimates overstate the worst case, in a model (ChipletOS, chip packaging)
- Signing off some tiles near a chip-mask edit, in simulation (ChipletOS, chip printing)
- A near-constant-size sign-off record for a photomask (ChipletOS, chip printing)